Home2L - C/C++ API  v1.2-2-ga4fe (2023-04-15)
Smart Tools for a Private Home
configure.h
Go to the documentation of this file.
1 /*
2  * This file is part of the Home2L project.
3  *
4  * (C) 2015-2021 Gundolf Kiefer
5  *
6  * Home2L is free software: you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation, either version 3 of the License, or
9  * (at your option) any later version.
10  *
11  * Home2L is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with Home2L. If not, see <https://www.gnu.org/licenses/>.
18  *
19  */
20 
21 
22 /* The purpose of this file is configure the compilation of the remaining source
23  * by setting a bunch of preprocessor definitions and make plausibility checks.
24  *
25  * It depends on the individual Brownie configuration as set in 'Family.mk'.
26  * Options that can be set there are documented below in section 1.
27  *
28  * This file may be edited and extend for the following purposes:
29  * - adding support for a new MCU model (-> section 3),
30  * - adding a new feature module (-> all sections),
31  * - changing pin assignments for some features on some MCU model(s).
32  *
33  * This file is arranged in the following sections:
34  *
35  * 1. Features: User Parameters
36  * - any user parameters settable in 'Family.mk' are predefined and documented here.
37  *
38  * 2. Features: Auto-Completion
39  * - auto-completion of feature-related parameters ('WITH_*' macros)
40  * - auto-enable "timer" and "notify" features
41  *
42  * 3. MCU: Pin Assignments
43  * - pin assignments of supported MCU types
44  *
45  * -> EDIT this section to add a new MCU model.
46  *
47  * 4. Pins: Auto-Completion and Interrupt Configuration
48  * - auto-generate pin-related macros (P_*, RESET_DDR_IN_*, RESET_DDR_OUT_*, RESET_DDR_STATE_*)
49  * - feature-specific interrupt settings (PCINT_*)
50  *
51  * 5. Pins: Checks
52  * - sanity checks
53  *
54  * 6. MCU: Main Macros
55  * - define INIT_PINS() macro
56  * - define macros for ping change interrupts: PCINT_ALL_PINS, PCINT_CALL_SUBISRS(P)
57  */
58 
59 
60 #ifndef _BROWNIE_CONFIG_
61 #define _BROWNIE_CONFIG_
62 
63 
76 #include "base.h"
77 
78 
79 
80 
81 
82 // ************************ 1. Features: User Parameters ***********************
83 
84 
85 // This section lists and documents the user-definable feature settings and
86 // sets defaults.
87 
88 
89 
92 
93 #ifndef IS_MAINTENANCE
94 #define IS_MAINTENANCE 0
95 #endif
96 
97 #ifndef TWI_SL_NOTIFY
98 #define TWI_SL_NOTIFY (!IS_MAINTENANCE)
103 #endif
104 
105 #ifndef TWI_SL_NOTIFY_US
106 #define TWI_SL_NOTIFY_US 10000.0
113 #endif
114 
115 
116 
120 
121 #ifndef WITH_TIMER
122 #define WITH_TIMER 0
123 #endif
124 
125 
126 
130 
131 #ifndef GPIO_IN_PRESENCE
132 #define GPIO_IN_PRESENCE 0
133 #endif
134 
135 #ifndef GPIO_IN_PULLUP
136 #define GPIO_IN_PULLUP 0
137 #endif
138 
139 #ifndef GPIO_OUT_PRESENCE
140 #define GPIO_OUT_PRESENCE 0
141 #endif
142 
143 #ifndef GPIO_OUT_PRESET
144 #define GPIO_OUT_PRESET 0
145 #endif
146 
147 
148 
160 
161 #ifndef WITH_TWIHUB
162 #define WITH_TWIHUB 0
163 #endif
164 #ifndef TWIHUB_PORT
165 #define TWIHUB_PORT 0
166 #endif
167 
168 #ifndef TWI_MA_PORTS
169 #define TWI_MA_PORTS (WITH_TWIHUB ? 1 : 0)
170 #endif
171 #ifndef TWI_MA_INTERNAL_PULLUP
172 #define TWI_MA_INTERNAL_PULLUP 0
173 #endif
174 
175 
176 
193 
194 #ifndef MATRIX_ROWS
195 #define MATRIX_ROWS 0
196 #endif
197 
198 #ifndef MATRIX_COLS
199 #define MATRIX_COLS 0
200 #endif
201 
202 #ifndef MATRIX_ROWS_GSHIFT
203 #if MATRIX_ROWS >= 2
204 #define MATRIX_ROWS_GSHIFT (GPIO_PINS_MAX - MATRIX_ROWS)
210 #else
211 #define MATRIX_ROWS_GSHIFT GPIO_PINS_MAX // no stimulating lines at all ...
212 #endif
213 #endif
214 
215 #ifndef MATRIX_COLS_GSHIFT
216 #define MATRIX_COLS_GSHIFT (MATRIX_ROWS_GSHIFT - MATRIX_COLS)
220 #endif
221 
222 #ifndef MATRIX_T_SAMPLE
223 #define MATRIX_T_SAMPLE 4
224 #endif
225 
226 #ifndef MATRIX_T_PERIOD
227 #define MATRIX_T_PERIOD 16
228 #endif
229 
230 #ifndef MATRIX_BUFSIZE
231 #define MATRIX_BUFSIZE 8
232 #endif
233 
234 
235 
239 
240 #ifndef ADC_PORTS
241 #define ADC_PORTS 0
242 #endif
243 
244 #ifndef ADC_PERIOD
245 #define ADC_PERIOD 1024
255 #endif
256 
257 #ifndef P_ADC_0_STROBE
258 #define P_ADC_0_STROBE 0
261 #endif
262 
263 #ifndef ADC_0_STROBE_VALUE
264 #define ADC_0_STROBE_VALUE 1
265 #endif
266 
267 #ifndef ADC_0_STROBE_TICKS
268 #define ADC_0_STROBE_TICKS 0
269 #endif
270 
271 #ifndef P_ADC_1_STROBE
272 #define P_ADC_1_STROBE 0
273 #endif
274 
275 #ifndef ADC_1_STROBE_VALUE
276 #define ADC_1_STROBE_VALUE 1
277 #endif
278 
279 #ifndef ADC_1_STROBE_TICKS
280 #define ADC_1_STROBE_TICKS 0
281 #endif
282 
283 
284 
288 
289 #ifndef WITH_UART
290 #define WITH_UART 0
291 #endif
292 
293 #ifndef UART_WITH_DRIVE
294 #define UART_WITH_DRIVE 1
295 #endif
296 
297 #ifndef UART_TX_LISTEN
298 #define UART_TX_LISTEN 10
299 #endif
300 
301 #ifndef UART_TX_INV
302 #define UART_TX_INV 1
303 #endif
304 
305 #ifndef UART_RX_INV
306 #define UART_RX_INV 1
307 #endif
308 
309 #ifndef UART_BAUDRATE
310 #define UART_BAUDRATE 9600
311 #endif
312 
313 #ifndef UART_STOPBITS
314 #define UART_STOPBITS 1
315 #endif
316 
317 #ifndef UART_PARITY
318 #define UART_PARITY 0
319 #endif
320 
321 #ifndef UART_TX_BUFSIZE
322 #define UART_TX_BUFSIZE 16
323 #endif
324 
325 #ifndef UART_RX_BUFSIZE
326 #define UART_RX_BUFSIZE 16
327 #endif
328 
329 #ifndef UART_MULTI_BYTE_ISR
330 #define UART_MULTI_BYTE_ISR 1
334 #endif
335 
336 
337 
341 
342 #ifndef WITH_TEMP_ZACWIRE
343 #define WITH_TEMP_ZACWIRE 0
344 #endif
345 
346 #ifndef TEMP_NOTIFY
347 #define TEMP_NOTIFY 0
348 #endif
349 
350 
351 
370 
371 #ifndef SHADES_PORTS
372 #define SHADES_PORTS 0
373 #endif
374 
375 #ifndef SHADES_TIMEOUT
376 #define SHADES_TIMEOUT 30000
384 #endif
385 
386 #ifndef SHADES_REVERSE_DELAY
387 #define SHADES_REVERSE_DELAY 1000
389 #endif
390 
391 #ifndef SHADES_0_RINT_FAILSAFE
392 #define SHADES_0_RINT_FAILSAFE 0xff
405 #endif
406 #ifndef SHADES_1_RINT_FAILSAFE
407 #define SHADES_1_RINT_FAILSAFE 0xff
408 #endif
409 
410 #ifndef SHADES_PERSISTENCE
411 #define SHADES_PERSISTENCE 1
414 #endif
415 
416 #ifndef SHADES_TOLERANCE
417 #define SHADES_TOLERANCE 2
420 #endif
421 
422 
425 
426 
427 
428 
429 
430 // ************************ 2. Features: Auto-Completion ***********************
431 
432 
433 #if !DOXYGEN
434 
435 
436 // GPIO ...
437 #define WITH_GPIO ((GPIO_IN_PRESENCE) || (GPIO_OUT_PRESENCE))
438 
439 
440 // TWI Master...
441 #define WITH_TWI_MASTER ((TWI_MA_PORTS) > 0)
442 
443 
444 // Matrix...
445 #define WITH_MATRIX ((MATRIX_ROWS) * (MATRIX_COLS) != 0)
446 
447 #if !WITH_MATRIX // Make sure that 'matDim' becomes 0 if there is no matrix ...
448 #undef MATRIX_COLS
449 #undef MATRIX_ROWS
450 #define MATRIX_COLS 0
451 #define MATRIX_ROWS 0
452 #endif
453 
454 
455 // Analog (ADC) ...
456 #define WITH_ADC ((ADC_PORTS) > 0)
457 
458 
459 // UART ...
460 #if !UART_WITH_DRIVE
461 #undef UART_TX_LISTEN
462 #define UART_TX_LISTEN 0
463 #endif
464 
465 
466 // Shades ...
467 #define WITH_SHADES ((SHADES_PORTS) > 0)
468 
469 
470 // Timer ...
471 #if WITH_MATRIX || WITH_ADC || WITH_UART || WITH_SHADES || WITH_TEMP_ZACWIRE
472  // The above features require the timer: Auto-enable it
473 #undef WITH_TIMER
474 #define WITH_TIMER 1
475 #endif
476 
477 
478 // Notifications ...
479 #if !WITH_GPIO && !WITH_TWIHUB && !WITH_MATRIX && !WITH_SHADES
480  // Without any of these features, notifications make no sense:
481  // We disable notification at all.
482 #undef TWI_SL_NOTIFY
483 #define TWI_SL_NOTIFY 0
484 #endif
485 
486 
487 #endif // !DOXYGEN
488 
489 
490 
491 
492 
493 // ******************* 3. MCU: Pin Assignments *********************************
494 
495 
496 #if DOXYGEN
497 
498 
499 // Note: All Doxygen documentation for the MCU port assignemts is done here at
500 // the beginning of this section to deal with the alternative sections
501 // defining the constants of the same names.
502 
503 
517 #define ISR_PCINT0
518 #define ISR_PCINT1
519 #define ISR_USI_STARTCOND
520 #define ISR_USI_OVERFLOW
521 
522 // USI ...
523 #define P_USI_SCL
524 #define P_USI_SDA
525 
526 // GPIOs ...
527 #define GPIO_PINS_MAX
528 #define GPIO_TO_PMASK(GMASK)
530 #define GPIO_FROM_PMASK(PMASK)
538 
539 // TWI Master ...
540 #define P_TWI_MA_0_SCL
541 #define P_TWI_MA_0_SDA
542 
543 // ADC(s) ...
544 #define P_ADC_0
545 #define P_ADC_1
546 
547 // UART ...
548 #define P_UART_RX
549 #define P_UART_TX
550 #define P_UART_DRIVE
551 
552 // Temperature ...
553 #define P_TEMP_ZACWIRE
554 
555 // Shades ...
556 #define P_SHADES_0_BTN_UP
557 #define P_SHADES_0_BTN_DN
558 #define P_SHADES_0_ACT_UP
559 #define P_SHADES_0_ACT_DN
560 #define P_SHADES_1_BTN_UP
561 #define P_SHADES_1_BTN_DN
562 #define P_SHADES_1_ACT_UP
563 #define P_SHADES_1_ACT_DN
564 
566 #else // DOXYGEN
567 
568 
569 
570 
571 
572 // ***** ATtiny85 *****
573 
574 
575 #if MCU_TYPE == BR_MCU_ATTINY85
576 
577 
578 // Interrupts ...
579 // Interrupt vector names vary with the MCU model. A translation list can be found at:
580 // https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html
581 #define ISR_PCINT0 PCINT0_vect
582 #define ISR_USI_STARTCOND USI_START_vect
583 #define ISR_USI_OVERFLOW USI_OVF_vect
584 
585 // USI ...
586 #define P_USI_SCL P_B2
587 #define P_USI_SDA P_B0
588 
589 // GPIOs ...
590 #define GPIO_PINS_MAX 3
591 
592 #define GPIO_TO_PMASK(GMASK) ((((GMASK) & 0x06) << 10) | (((GMASK) & 0x01) << 9))
593 #define GPIO_FROM_PMASK(PMASK) ((((PMASK) & 0x18) >> 10) | (((PMASK) & 0x02) >> 9))
594  // Macros to map logical GPIO pins to port A and port B bits.
595  // Unused bits should be masked out, so that 'GPIO_TO_PMASK(0xffff)' identifies
596  // all ports usable as GPIOs and GPIO_FROM_MASK(0xffff) identifies all logically
597  // usable GPIOs, respectively.
598 
599 // TWI Master ...
600 #define P_TWI_MA_0_SCL P_B3
601 #define P_TWI_MA_0_SDA P_B4
602 
603 // UART ...
604 #define P_UART_RX P_B1
605 #define P_UART_TX P_B3
606 #define P_UART_DRIVE P_B4
607 
608 
609 
610 
611 
612 // ***** ATtiny84 *****
613 
614 
615 #elif MCU_TYPE == BR_MCU_ATTINY84
616 
617 
618 // Interrupts ...
619 // Interrupt vector names vary with the MCU model. A translation list can be found at:
620 // https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html
621 #define ISR_PCINT0 PCINT0_vect
622 #define ISR_PCINT1 PCINT1_vect
623 #define ISR_USI_STARTCOND USI_STR_vect
624 #define ISR_USI_OVERFLOW USI_OVF_vect
625 
626 // USI ...
627 #define P_USI_SCL P_A4
628 #define P_USI_SDA P_A6
629 
630 // GPIOs ...
631 #define GPIO_PINS_MAX 8
632 
633 #define GPIO_TO_PMASK(GMASK) (((GMASK) & 0x8f) | (((GMASK) & 0x70) << 4))
634 #define GPIO_FROM_PMASK(PMASK) (((PMASK) & 0x8f) | ((((PMASK) >> 4)) & 0x70))
635  // Macros to map logical GPIO pins to port A and port B bits.
636  // Unused bits should be masked out, so that 'GPIO_TO_PMASK(0xffff)' identifies
637  // all ports usable as GPIOs and GPIO_FROM_MASK(0xffff) identifies all logically
638  // usable GPIOs, respectively.
639 
640 // TWI Master ...
641 #define P_TWI_MA_0_SCL P_B0
642 #define P_TWI_MA_0_SDA P_B1
643 
644 // ADC(s) ...
645 #define P_ADC_0 P_A5
646 #define P_ADC_1 P_A7
647 
648 // UART ...
649 #define P_UART_RX P_B0
650 #define P_UART_TX P_B1
651 #define P_UART_DRIVE P_B2
652 
653 // Temperature ...
654 #define P_TEMP_ZACWIRE P_A0
655 
656 // Shades ...
657 #define P_SHADES_0_BTN_UP P_A2
658 #define P_SHADES_0_BTN_DN P_A1
659 #define P_SHADES_0_ACT_UP P_B1
660 #define P_SHADES_0_ACT_DN P_B0
661 
662 #define P_SHADES_1_BTN_UP P_A3
663 #define P_SHADES_1_BTN_DN P_A5
664 #define P_SHADES_1_ACT_UP P_B2
665 #define P_SHADES_1_ACT_DN P_A7
666 
667 
668 
669 
670 
671 // ***** ATtiny861 *****
672 
673 
674 #elif MCU_TYPE == BR_MCU_ATTINY861
675 
676 
677 // Interrupts ...
678 // Interrupt vector names vary with the MCU model. A translation list can be found at:
679 // https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html
680 #define ISR_PCINT PCINT_vect // one vector for PCINT0 and PCINT1 (different from t84/t85)
681 #define ISR_USI_STARTCOND USI_START_vect
682 #define ISR_USI_OVERFLOW USI_OVF_vect
683 
684 // USI ...
685 #define P_USI_SCL P_B2
686 #define P_USI_SDA P_B0
687 
688 // GPIOs ...
689 #define GPIO_PINS_MAX 12
690 
691 #define GPIO_TO_PMASK(GMASK) (((GMASK) & 0x0ff) | (((GMASK) & 0xf00) << 3))
692 #define GPIO_FROM_PMASK(PMASK) (((PMASK) & 0x0ff) | ((((PMASK) >> 3)) & 0xf00))
693  // Macros to map logical GPIO pins to port A and port B bits.
694  // Unused bits should be masked out, so that 'GPIO_TO_PMASK(0xffff)' identifies
695  // all ports usable as GPIOs and GPIO_FROM_MASK(0xffff) identifies all logically
696  // usable GPIOs, respectively.
697 
698 // ADC(s) ...
699 #define P_ADC_0 P_B5
700 #define P_ADC_1 P_B6
701 
702 // Temperature ...
703 #define P_TEMP_ZACWIRE P_B1
704 
705 
706 
707 #else // MCU_TYPE == ...
708 #error "Unknown MCU"
709 #endif // MCU_TYPE == ...
710 
711 
712 #endif // !DOXYGEN
713 
714 
715 
716 
717 
718 // ************ 4. Pins: Auto-Completion and Interrupt Configuration ***********
719 
720 
721 #if !DOXYGEN
722 
723 
724 // TWI Slave ...
725 // The TWI slave is always present and always uses the USI.
726 #define TWI_SL_SCL P_USI_SCL
727 #define TWI_SL_SDA P_USI_SDA
728 
729 #define RESET_DDR_IN_TWI_SL ((TWI_SL_SCL) | (TWI_SL_SDA))
730 #define RESET_DDR_OUT_TWI_SL 0
731 #define RESET_STATE_TWI_SL 0
732 
733 
734 // GPIOs ...
735 #define GPIO_HAVE_UPPER (((GPIO_IN_PRESENCE) >= 0x100 || (GPIO_OUT_PRESENCE) >= 0x100))
736 
737 #define RESET_DDR_IN_GPIO GPIO_TO_PMASK (GPIO_IN_PRESENCE)
738 #define RESET_DDR_OUT_GPIO GPIO_TO_PMASK (GPIO_OUT_PRESENCE)
739 #define RESET_STATE_GPIO GPIO_TO_PMASK ((GPIO_IN_PULLUP & GPIO_IN_PRESENCE) | (GPIO_OUT_PRESET & GPIO_OUT_PRESENCE))
740 
741 
742 // TWI Master ...
743 #if !WITH_TWI_MASTER || TWI_MA_PORTS < 1 || !defined(P_TWI_MA_0_SCL) || !defined(P_TWI_MA_0_SDA)
744 #undef P_TWI_MA_0_SCL
745 #undef P_TWI_MA_0_SDA
746 #define P_TWI_MA_0_SCL 0
747 #define P_TWI_MA_0_SDA 0
748 #endif
749 
750 #if !WITH_TWI_MASTER || TWI_MA_PORTS < 2 || !defined(P_TWI_MA_1_SCL) || !defined(P_TWI_MA_1_SDA)
751 #undef P_TWI_MA_1_SCL
752 #undef P_TWI_MA_1_SDA
753 #define P_TWI_MA_1_SCL 0
754 #define P_TWI_MA_1_SDA 0
755 #endif
756 
757 #if !WITH_TWI_MASTER || TWI_MA_PORTS < 3 || !defined(P_TWI_MA_2_SCL) || !defined(P_TWI_MA_2_SDA)
758 #undef P_TWI_MA_2_SCL
759 #undef P_TWI_MA_2_SDA
760 #define P_TWI_MA_2_SCL 0
761 #define P_TWI_MA_2_SDA 0
762 #endif
763 
764 #if !WITH_TWI_MASTER || TWI_MA_PORTS < 4 || !defined(P_TWI_MA_3_SCL) || !defined(P_TWI_MA_3_SDA)
765 #undef P_TWI_MA_3_SCL
766 #undef P_TWI_MA_3_SDA
767 #define P_TWI_MA_3_SCL 0
768 #define P_TWI_MA_3_SDA 0
769 #endif
770 
771 #define RESET_DDR_IN_TWI_MA ((P_TWI_MA_0_SCL) | (P_TWI_MA_0_SDA) | (P_TWI_MA_1_SCL) | (P_TWI_MA_1_SDA) \
772  | (P_TWI_MA_2_SCL) | (P_TWI_MA_2_SDA) | (P_TWI_MA_3_SCL) | (P_TWI_MA_3_SDA))
773 #define RESET_DDR_OUT_TWI_MA 0
774 #define RESET_STATE_TWI_MA 0
775 
776 
777 // Matrix...
778 #if MATRIX_ROWS > 1
779 #define MATRIX_ROWS_GMASK (((1 << MATRIX_ROWS) - 1) << MATRIX_ROWS_GSHIFT) // GPIO mask of the stimulating lines
780 #else
781 #define MATRIX_ROWS_GMASK 0 // no stimulating lines at all ...
782 #endif
783 #define MATRIX_COLS_GMASK (((1 << MATRIX_COLS) - 1) << MATRIX_COLS_GSHIFT) // GPIO mask of the sensing lines
784 
785 #define RESET_DDR_IN_MATRIX GPIO_TO_PMASK (MATRIX_COLS_GMASK)
786 #define RESET_DDR_OUT_MATRIX GPIO_TO_PMASK (MATRIX_ROWS_GMASK)
787 #define RESET_STATE_MATRIX 0 // drive '0' on row lines, keep column lines at high-impedance state
788 
789 
790 // ADC(s) ...
791 #if !WITH_ADC || ADC_PORTS < 1 || !defined(P_ADC_0)
792 #undef P_ADC_0
793 #define P_ADC_0 0
794 #undef P_ADC_0_STROBE
795 #define P_ADC_0_STROBE 0
796 #endif
797 
798 #if !WITH_ADC || ADC_PORTS < 2 || !defined(P_ADC_1)
799 #undef P_ADC_1
800 #define P_ADC_1 0
801 #undef P_ADC_1_STROBE
802 #define P_ADC_1_STROBE 0
803 #endif
804 
805 #define RESET_DDR_IN_ADC (P_ADC_0 | P_ADC_1)
806 #define RESET_DDR_OUT_ADC (P_ADC_0_STROBE | P_ADC_1_STROBE)
807 #define RESET_STATE_ADC ((ADC_0_STROBE_VALUE == 0 ? P_ADC_0_STROBE : 0) | (ADC_1_STROBE_VALUE == 0 ? P_ADC_1_STROBE : 0))
808 
809 
810 // UART ...
811 #if !WITH_UART
812 #undef P_UART_RX
813 #undef P_UART_TX
814 #undef P_UART_DRIVE
815 #define P_UART_RX 0
816 #define P_UART_TX 0
817 #define P_UART_DRIVE 0
818 #else
819 #if !UART_WITH_DRIVE
820 #undef P_UART_DRIVE
821 #define P_UART_DRIVE 0
822 #endif
823 #endif // !WITH_UART
824 
825 #define RESET_DDR_IN_UART (P_UART_RX)
826 #define RESET_DDR_OUT_UART (P_UART_TX | P_UART_DRIVE)
827 #define RESET_STATE_UART (P_UART_TX)
828 
829 #define PCINT_PIN_UART P_UART_RX
830 #define PCINT_ISR_UART UartISR
831 
832 
833 
834 // Temperature ...
835 #if !WITH_TEMP_ZACWIRE || !defined(P_TEMP_ZACWIRE)
836 #undef P_TEMP_ZACWIRE
837 #define P_TEMP_ZACWIRE 0
838 #endif
839 
840 #define RESET_DDR_IN_TEMP P_TEMP_ZACWIRE
841 #define RESET_DDR_OUT_TEMP 0
842 #define RESET_STATE_TEMP 0
843 
844 #define PCINT_PIN_TEMP P_TEMP_ZACWIRE
845 #define PCINT_ISR_TEMP TemperatureISR
846 
847 
848 
849 // Shades ...
850 #if !WITH_SHADES || SHADES_PORTS < 1 || \
851  !defined(P_SHADES_0_BTN_UP) || !defined(P_SHADES_0_BTN_DN) || !defined(P_SHADES_0_ACT_UP) || !defined(P_SHADES_0_ACT_DN)
852 #undef P_SHADES_0_BTN_UP
853 #undef P_SHADES_0_BTN_DN
854 #undef P_SHADES_0_ACT_UP
855 #undef P_SHADES_0_ACT_DN
856 #define P_SHADES_0_BTN_UP 0
857 #define P_SHADES_0_BTN_DN 0
858 #define P_SHADES_0_ACT_UP 0
859 #define P_SHADES_0_ACT_DN 0
860 #endif
861 
862 #if !WITH_SHADES || SHADES_PORTS < 2 || \
863  !defined(P_SHADES_1_BTN_UP) || !defined(P_SHADES_1_BTN_DN) || !defined(P_SHADES_1_ACT_UP) || !defined(P_SHADES_1_ACT_DN)
864 #undef P_SHADES_1_BTN_UP
865 #undef P_SHADES_1_BTN_DN
866 #undef P_SHADES_1_ACT_UP
867 #undef P_SHADES_1_ACT_DN
868 #define P_SHADES_1_BTN_UP 0
869 #define P_SHADES_1_BTN_DN 0
870 #define P_SHADES_1_ACT_UP 0
871 #define P_SHADES_1_ACT_DN 0
872 #endif
873 
874 #define RESET_DDR_IN_SHADES (P_SHADES_0_BTN_UP | P_SHADES_0_BTN_DN | P_SHADES_1_BTN_UP | P_SHADES_1_BTN_DN)
875 #define RESET_DDR_OUT_SHADES (P_SHADES_0_ACT_UP | P_SHADES_0_ACT_DN | P_SHADES_1_ACT_UP | P_SHADES_1_ACT_DN)
876 #define RESET_STATE_SHADES RESET_DDR_IN_SHADES // activate internal pullups for shades buttons
877 
878 
879 #endif // !DOXYGEN
880 
881 
882 
883 
884 
885 // ************************ 5. Pins: Checks ************************************
886 
887 
888 #if !DOXYGEN // The doxygen preprocessor may have some problems with the following macros.
889 
890 
891 // ***** Check for pin conflicts *****
892 
893 // Use masks per feature ...
894 #define USEMASK_TWI_SL (TWI_SL_SCL | TWI_SL_SDA)
895 #define USEMASK_GPIO (RESET_DDR_IN_GPIO | RESET_DDR_OUT_GPIO )
896 #define USEMASK_TWI_MA (RESET_DDR_IN_TWI_MA | RESET_DDR_OUT_TWI_MA )
897 #define USEMASK_ADC (RESET_DDR_IN_ADC | RESET_DDR_OUT_ADC )
898 #define USEMASK_UART (RESET_DDR_IN_UART | RESET_DDR_OUT_UART )
899 #define USEMASK_MATRIX (RESET_DDR_IN_MATRIX | RESET_DDR_OUT_MATRIX )
900 #define USEMASK_TEMP (RESET_DDR_IN_TEMP | RESET_DDR_OUT_TEMP )
901 #define USEMASK_SHADES (RESET_DDR_IN_SHADES | RESET_DDR_OUT_SHADES )
902 
903 // Compute XOR and and arithmetic sum of all use masks ...
904 // If and only if two or more feature use masks have same bits set, these two numbers differ.
905 #define USEXOR (USEMASK_TWI_SL ^ USEMASK_GPIO ^ USEMASK_TWI_MA ^ USEMASK_MATRIX ^ USEMASK_ADC ^ USEMASK_UART ^ USEMASK_TEMP ^ USEMASK_SHADES)
906 #define USESUM (USEMASK_TWI_SL + USEMASK_GPIO + USEMASK_TWI_MA + USEMASK_MATRIX + USEMASK_ADC + USEMASK_UART + USEMASK_TEMP + USEMASK_SHADES)
907 
908 // Check for errors ...
909 #if USEXOR != USESUM
910 
911 // We have a conflict: Try to print the cause(s) as warnings ...
912 #if (USEXOR ^ USEMASK_TWI_SL) == (USESUM - USEMASK_TWI_SL)
913 #warning "TWI slave pins conflict with others!"
914 #endif
915 
916 #if (USEXOR ^ USEMASK_GPIO) == (USESUM - USEMASK_GPIO)
917 #warning "GPIO pins conflict with others!"
918 #endif
919 
920 #if (USEXOR ^ USEMASK_TWI_MA) == (USESUM - USEMASK_TWI_MA)
921 #warning "TWI master pins conflict with others!"
922 #endif
923 
924 #if (USEXOR ^ USEMASK_MATRIX) == (USESUM - USEMASK_MATRIX)
925 #warning "Matrix pins conflict with others!"
926 #endif
927 
928 #if (USEXOR ^ USEMASK_ADC) == (USESUM - USEMASK_ADC)
929 #warning "ADC pin(s) conflict with others!"
930 #endif
931 
932 #if (USEXOR ^ USEMASK_UART) == (USESUM - USEMASK_UART)
933 #warning "UART pin(s) conflict with others!"
934 #endif
935 
936 #if (USEXOR ^ USEMASK_TEMP) == (USESUM - USEMASK_TEMP)
937 #warning "Temperature pin conflicts with others!"
938 #endif
939 
940 #if (USEXOR ^ USEMASK_SHADES) == (USESUM - USEMASK_SHADES)
941 #warning "Shades pin(s) conflict with others!"
942 #endif
943 
944 #error "There are pin conflicts!"
945 
946 #endif // USEMASK != USESUM
947 
948 
949 
950 // ***** Feature-specific checks *****
951 
952 
953 // GPIO ...
954 #if (GPIO_IN_PRESENCE & GPIO_OUT_PRESENCE) \
955  || (GPIO_IN_PRESENCE) >= (1 << GPIO_PINS_MAX) \
956  || (GPIO_OUT_PRESENCE) >= (1 << GPIO_PINS_MAX)
957 #error "GPIOs misconfigured: Too many or concliction GPIOs defined!"
958 #endif
959 
960 
961 // TWI Master...
962 #if TWI_MA_PORTS > 0 && (!P_TWI_MA_0_SCL || !P_TWI_MA_0_SDA)
963 #error "TWI master port #0 enabled by configuration, but no MCU pins available!"
964 #endif
965 #if TWI_MA_PORTS > 1 && (!P_TWI_MA_1_SCL || !P_TWI_MA_1_SDA)
966 #error "TWI master port #1 enabled by configuration, but no MCU pins available!"
967 #endif
968 #if TWI_MA_PORTS > 2 && (!P_TWI_MA_2_SCL || !P_TWI_MA_2_SDA)
969 #error "TWI master port #2 enabled by configuration, but no MCU pins available!"
970 #endif
971 #if TWI_MA_PORTS > 3 && (!P_TWI_MA_3_SCL || !P_TWI_MA_3_SDA)
972 #error "TWI master port #3 enabled by configuration, but no MCU pins available!"
973 #endif
974 #if TWI_MA_PORTS > 4
975 #error "At most 4 TWI master ports supported!"
976 #endif
977 
978 
979 // TWI Hub...
980 #if TWIHUB_PORT > TWI_MA_PORTS
981 #error "TWI hub: non-existing master port selected"
982 #endif
983 
984 
985 // Matrix...
986 #if !WITH_MATRIX && (MATRIX_ROWS || MATRIX_COLS)
987 #warning "Matrix appears to be partly configured - disabled."
988 #endif
989 #if MATRIX_ROWS > 8
990 #error "Matrix: too many rows!"
991 #endif
992 #if MATRIX_COLS > 8
993 #error "Matrix: too many columns!"
994 #endif
995 #if (MATRIX_ROWS > 1) && ((MATRIX_ROWS_GSHIFT < 0) || ((MATRIX_ROWS_GSHIFT + MATRIX_ROWS) > GPIO_PINS_MAX))
996 #error "Matrix: some row lines assigned to non-existing GPIO pins!"
997 #endif
998 #if (MATRIX_COLS_GSHIFT < 0) || ((MATRIX_COLS_GSHIFT + MATRIX_COLS) > GPIO_PINS_MAX)
999 #error "Matrix: some column lines assigned to non-existing GPIO pins!"
1000 #endif
1001 #if (MATRIX_ROWS_GMASK & MATRIX_COLS_GMASK) != 0
1002 #error "Matrix: row and column pins overlap!"
1003 #endif
1004 
1005 
1006 // ADCs ...
1007 #if ADC_PORTS > 0 && !P_ADC_0
1008 #error "ADC #0 enabled by configuration, but no MCU pin available!"
1009 #endif
1010 #if ADC_PORTS > 1 && !P_ADC_1
1011 #error "ADC #1 enabled by configuration, but no MCU pin available!"
1012 #endif
1013 #if ADC_PORTS > 2
1014 #error "At most 2 ADC ports supported!"
1015 #endif
1016 
1017 
1018 // UART ...
1019 #if WITH_UART && (!P_UART_RX || !P_UART_TX)
1020 #error "UART enabled by configuration, but no MCU pins available!"
1021 #endif
1022 
1023 
1024 // Temperature ...
1025 #if WITH_TEMP_ZACWIRE && (!P_TEMP_ZACWIRE)
1026 #error "Temperature ZACwire port enabled by configuration, but no MCU pin available!"
1027 #endif
1028 
1029 
1030 // Shades ...
1031 #if SHADES_PORTS > 0 && (!P_SHADES_0_BTN_DN || !P_SHADES_0_BTN_UP || !P_SHADES_0_ACT_DN || !P_SHADES_0_ACT_UP)
1032 #error "Shades #0 enabled by configuration, but no MCU pins available!"
1033 #endif
1034 #if SHADES_PORTS > 1 && (!P_SHADES_1_BTN_DN || !P_SHADES_1_BTN_UP || !P_SHADES_1_ACT_DN || !P_SHADES_1_ACT_UP)
1035 #error "Shades #1 enabled by configuration, but no MCU pins available!"
1036 #endif
1037 #if SHADES_PORTS > 2
1038 #error "At most 2 shades supported!"
1039 #endif
1040 
1041 
1042 #endif // !DOXYGEN
1043 
1044 
1045 
1046 
1047 
1048 // *************************** 6. MCU: Main Macros *****************************
1049 
1050 
1051 // Reset configuration for all used pins ...
1052 #define RESET_DDR_IN_USED (RESET_DDR_IN_TWI_SL | RESET_DDR_IN_GPIO | RESET_DDR_IN_TWI_MA | RESET_DDR_IN_MATRIX | RESET_DDR_IN_ADC | RESET_DDR_IN_UART | RESET_DDR_IN_TEMP | RESET_DDR_IN_SHADES)
1053 #define RESET_DDR_OUT_USED (RESET_DDR_OUT_TWI_SL | RESET_DDR_OUT_GPIO | RESET_DDR_OUT_TWI_MA | RESET_DDR_OUT_MATRIX | RESET_DDR_OUT_ADC | RESET_DDR_OUT_UART | RESET_DDR_OUT_TEMP | RESET_DDR_OUT_SHADES)
1054 #define RESET_STATE_USED (RESET_STATE_TWI_SL | RESET_STATE_GPIO | RESET_STATE_TWI_MA | RESET_STATE_MATRIX | RESET_STATE_ADC | RESET_STATE_UART | RESET_STATE_TEMP | RESET_STATE_SHADES)
1055 
1056 // Interrupts: All PCINT pins ...
1057 #define PCINT_ALL_PINS (PCINT_PIN_UART | PCINT_PIN_TEMP)
1058 
1059 // Interrupts: PCINT ISR template ...
1060 #define PCINT_CALL_SUBISRS(P) \
1061  if ((P) & PCINT_PIN_UART) PCINT_ISR_UART(); \
1062  if ((P) & PCINT_PIN_TEMP) PCINT_ISR_TEMP();
1063 
1064 
1065 
1066 // Explicitly define the mask for all unused pins ...
1067 // The TWI slave pins, Reset, VCC and GND are excluded here.
1068 // We assume that all other pins are generally usable as GPIOs.
1069 #define UNUSED_PINS (GPIO_TO_PMASK(0xffff) & ~(RESET_DDR_IN_USED | RESET_DDR_OUT_USED))
1070 
1071 // Reset configuration for all pins ...
1072 #define RESET_DDR_IN (RESET_DDR_IN_USED | UNUSED_PINS)
1073 #define RESET_DDR_OUT RESET_DDR_OUT_USED
1074 
1075 #if !IS_MAINTENANCE
1076 #define RESET_STATE (RESET_STATE_USED | UNUSED_PINS)
1077  // Following the Atmel/Microchip recommendations, unused pins are configured as
1078  // inputs with their internal pullups activated in operational mode.
1079  // This allows to omit external circuitry for them.
1080 #else
1081 #define RESET_STATE (RESET_STATE_USED)
1082  // In maintenance mode, all ports are set into a high-impedance state. This may cause inputs to float.
1083  // However, we avoid to pull up outputs (in operational mode) in a way that undesired behavior results.
1084 #endif
1085 
1086 
1087 
1088 // Initialization macro for the main program ...
1089 #define INIT_PINS() do { \
1090  P_DDR_IN(RESET_DDR_IN | RESET_DDR_OUT); \
1091  P_OUT_0((RESET_DDR_IN | RESET_DDR_OUT) & ~RESET_STATE); \
1092  P_OUT_1((RESET_DDR_IN | RESET_DDR_OUT) & RESET_STATE); \
1093  P_DDR_OUT(RESET_DDR_OUT); \
1094 } while(false);
1095 
1096 
1097 
1098 
1099 
1100 #endif // _BROWNIE_CONFIG_