core.h

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/*
 *  This file is part of the Home2L project.
 *
 *  (C) 2015-2021 Gundolf Kiefer
 *
 *  Home2L is free software: you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation, either version 3 of the License, or
 *  (at your option) any later version.
 *
 *  Home2L is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with Home2L. If not, see <https://www.gnu.org/licenses/>.
 *
 */
 
 
#ifndef _CORE_
#define _CORE_
 
#include "configure.h"
 
 
#define EMPTY_MODULE(NAME)                                          \
  static inline void NAME##Init () {}                               \
  static inline void NAME##Iterate () {}                            \
  static inline void NAME##OnRegRead (uint8_t reg) {}               \
  static inline void NAME##OnRegWrite (uint8_t reg, uint8_t val) {} \
  static inline void NAME##ISR () {}
 
 
 
 
// *************************** Memory and Registers ****************************
 
 
 
 
 
// ***** VROM *****
 
extern const __flash TBrFeatureRecord brFeatureRecord;
 
 
 
// ***** Configuration (SRAM-backed) *****
 
extern TBrConfigRecord _brConfigRecord;       
#define brConfigRecord ((const TBrConfigRecord) _brConfigRecord)
 
 
 
 
// ***** Registers *****
 
extern uint8_t _regFile[BR_REGISTERS];        
 
#define RegGet(REG) (_regFile[REG])
#define RegSet(REG, VAL) do { _regFile[REG] = (VAL); } while (0)
 
 
 
 
 
// ***************** Persistent Storage (EEPROM) *******************************
 
 
 
 
struct SBrEeprom {
  TBrIdRecord id;         
  TBrConfigRecord cfg;    
 
  // Module-related data for persistency ...
  uint8_t shadesPos[2];   
};
 
 
extern struct SBrEeprom brEeprom;
 
 
 
 
 
// *************************** Change Reporting ********************************
 
 
 
 
#if !IS_MAINTENANCE || DOXYGEN
 
 
extern uint8_t chgShadow;      
 
 
static inline void ReportChange (uint8_t mask) { chgShadow |= mask; }
void ReportChangeAndNotify (uint8_t mask);
 
 
#endif // IS_MAINTENANCE
 
 
 
 
 
// *************************** Timer *******************************************
 
 
 
 
#if WITH_TIMER || DOXYGEN
 
 
// Constants are defined in 'interface.h' (BR_TICKS_*).
 
 
uint16_t TimerNow ();
 
 
#else   // WITH_TIMER
static inline uint16_t TimerNow () { return 0; }
#endif  // WITH_TIMER
 
 
 
 
 
// *************************** Mini-Timer **************************************
 
 
 
 
#define MINITICKS_OF_US(X) (X * (BR_CPU_FREQ / 1000000) / 8)
 
 
#if DOXYGEN
 
#define MINI_CLOCK_SCALE_1            
#define MINI_CLOCK_SCALE_8            
#define MINI_CLOCK_SCALE_64           
#define MINI_CLOCK_SCALE_256          
#define MINI_CLOCK_SCALE_1024         
 
void MinitimerStart (int clockScale); 
void MinitimerStop ();                
void MinitimerReset();                
uint8_t MinitimerNow();               
 
 
#elif MCU_TYPE == BR_MCU_ATTINY85 || MCU_TYPE == BR_MCU_ATTINY84
 
 
#define MINI_CLOCK_SCALE_1    1
#define MINI_CLOCK_SCALE_8    2
#define MINI_CLOCK_SCALE_64   3
#define MINI_CLOCK_SCALE_256  4
#define MINI_CLOCK_SCALE_1024 5
 
static inline void MinitimerStart (int CLOCK_SCALE) {
  TCCR0A = 0;   // Normal port operation (OC1A/OC1B disconnected); No waveform generation
  TCCR0B = CLOCK_SCALE;   // enable 8-bit timer with clk_io / 8; one tick is 8 µs; one ZACwire bit is 125 µs ~= 16 clock units
}
 
static inline void MinitimerStop () {
  TCCR0B = 0;
}
 
#define MinitimerReset() do { TCNT0 = 0; } while (0)
 
#define MinitimerNow() ((uint8_t) TCNT0)
 
 
#elif MCU_TYPE == BR_MCU_ATTINY861
 
 
#define MINI_CLOCK_SCALE_1    1
#define MINI_CLOCK_SCALE_8    4
#define MINI_CLOCK_SCALE_64   7
#define MINI_CLOCK_SCALE_256  9
#define MINI_CLOCK_SCALE_1024 11
 
static inline void MinitimerStart (int CLOCK_SCALE) {
  TCCR1A = 0;   // Normal port operation (OC1A/OC1B disconnected); No waveform generation
  TCCR1B = (1 << PSR1) | CLOCK_SCALE;
  TC1H = 0;     // Set high byte to 0 (affects TCNT1, OCR1C and any other 10 bit registers)
  OCR1C = 0xff; // "top" value for counter
  PLLCSR = 0;   // disable PLL, ensure synchronous mode
}
 
static inline void MinitimerStop () {
  TCCR1B = 0;
}
 
#define MinitimerReset() do { TCNT1 = 0; TCCR1B |= (1 << PSR1); } while (0)
  // Note: According to the manual, "Due to synchronization of the CPU, Timer/Counter1
  //       data written into Timer/Counter1 is delayed by one and half CPU clock cycles
  //       in synchronous mode". Hence, we add a delay here before reading TCNT1.
 
#define MinitimerNow() ((uint8_t) TCNT1)
 
 
#endif // MCU_TYPE == BR_MCU_ATTINY861
 
 
 
 
 
// ***************** Interface Functions of the "core" Module ******************
 
 
 
 
void CoreInit ();
static inline void CoreIterate () {}
void CoreOnRegRead (uint8_t reg);
void CoreOnRegWrite (uint8_t reg, uint8_t val);
 
 
 
 
 
 
#endif // _CORE_