66 #define BR_CPU_FREQ 1000000
68 #if AVR && BR_CPU_FREQ != F_CPU
69 #error "The CPU frequency (F_CPU) must be set to 1 MHz / BR_CPU_FREQ"
73 #define BR_TICKS_PER_SECOND (((float) BR_CPU_FREQ) / 1024.0)
74 #define BR_TICKS_PER_MS (BR_TICKS_PER_SECOND / 1000.0)
75 #define BR_MS_PER_TICK (1.0 / BR_TICKS_PER_MS)
77 #define BR_TICKS_OF_MS(T) ((T) * BR_TICKS_PER_MS)
78 #define BR_MS_OF_TICKS(T) (((float) (T)) * BR_MS_PER_TICK)
80 #define BR_TICKS_NEVER 0
112 #define BR_MEM_BLOCKSIZE_SHIFT 4
113 #define BR_MEM_BLOCKSIZE (1 << BR_MEM_BLOCKSIZE_SHIFT)
181 #define BR_REQUEST_SIZE_MAX ((int) sizeof (TBrRequest))
182 #define BR_REQUEST_SIZE_MIN 2
185 #define BR_REPLY_SIZE_MAX ((int) sizeof (TBrReply))
186 #define BR_REPLY_SIZE_MIN 1
187 #define BR_REPLY_SIZE_STATUS 1
191 #define BR_OP_REG_READ(REG) ((0x00 | (REG)))
192 #define BR_OP_REG_WRITE(REG) ((0x40 | (REG)))
193 #define BR_OP_MEM_READ(BLKADR) (0x80 | ((BLKADR) >> 8))
194 #define BR_OP_MEM_WRITE(BLKADR) (0x90 | ((BLKADR) >> 8))
197 #define BR_OP_IS_REG_READ(OP) (((OP) & 0xc0) == 0x00)
198 #define BR_OP_IS_REG_WRITE(OP) (((OP) & 0xc0) == 0x40)
199 #define BR_OP_IS_MEM_READ(OP) (((OP) & 0xf0) == 0x80)
200 #define BR_OP_IS_MEM_WRITE(OP) (((OP) & 0xf0) == 0x90)
259 #define BR_MEM_PAGE_FLASH 0x0
260 #define BR_MEM_PAGE_SRAM 0x8
261 #define BR_MEM_PAGE_EEPROM 0x9
262 #define BR_MEM_PAGE_VROM 0xa
265 #define BR_MEM_ADR_IS_FLASH(ADR) (((ADR) >> (BR_MEM_BLOCKSIZE_SHIFT+8)) <= BR_MEM_PAGE_FLASH + 7)
266 #define BR_MEM_ADR_IS_SRAM(ADR) (((ADR) >> (BR_MEM_BLOCKSIZE_SHIFT+8)) == BR_MEM_PAGE_SRAM)
267 #define BR_MEM_ADR_IS_EEPROM(ADR) (((ADR) >> (BR_MEM_BLOCKSIZE_SHIFT+8)) == BR_MEM_PAGE_EEPROM)
268 #define BR_MEM_ADR_IS_VROM(ADR) (((ADR) >> (BR_MEM_BLOCKSIZE_SHIFT+8)) == BR_MEM_PAGE_VROM)
271 #define BR_MEM_ADR_FLASH(OFS) ((OFS) | (BR_MEM_PAGE_FLASH << (BR_MEM_BLOCKSIZE_SHIFT+8)))
272 #define BR_MEM_ADR_SRAM(OFS) ((OFS) | (BR_MEM_PAGE_SRAM << (BR_MEM_BLOCKSIZE_SHIFT+8)))
273 #define BR_MEM_ADR_EEPROM(OFS) ((OFS) | (BR_MEM_PAGE_EEPROM << (BR_MEM_BLOCKSIZE_SHIFT+8)))
274 #define BR_MEM_ADR_VROM(OFS) ((OFS) | (BR_MEM_PAGE_VROM << (BR_MEM_BLOCKSIZE_SHIFT+8)))
277 #define BR_MEM_OFS(ADR) ((ADR) & ((BR_MEM_ADR_IS_FLASH(ADR) ? 0x7ff : 0x0ff) << BR_MEM_BLOCKSIZE_SHIFT))
282 #define BR_FLASH_PAGESIZE 0x40
291 #define BR_FLASH_BASE_MAINTENANCE 0x0040
293 #define BR_FLASH_BASE_OPERATIONAL 0x0a00
299 #define BR_VROM_SIZE sizeof (TBrFeatureRecord)
303 #define BR_EEPROM_ID_BASE 0x0000
304 #define BR_EEPROM_ID_SIZE sizeof (TBrIdRecord)
306 #define BR_EEPROM_CFG_BASE 0x0000 + BR_EEPROM_ID_SIZE
307 #define BR_EEPROM_CFG_SIZE sizeof (TBrConfigRecord)
321 #define BR_MAGIC 0xb1
336 uint8_t versionMinor;
337 uint16_t versionRevision;
363 #define brFeatureRecordRcVec0 offsetof (TBrFeatureRecord, features)
365 #define brFeatureRecordRcVec1 offsetof (TBrFeatureRecord, reserved)
374 #define BR_FEATURE_MAINTENANCE 0x0001
375 #define BR_FEATURE_TIMER 0x0002
376 #define BR_FEATURE_NOTIFY 0x0004
377 #define BR_FEATURE_TWIHUB 0x0008
378 #define BR_FEATURE_ADC_0 0x0010
379 #define BR_FEATURE_ADC_1 0x0020
380 #define BR_FEATURE_ADC_PASSIVE 0x0400
381 #define BR_FEATURE_UART 0x0040
382 #define BR_FEATURE_TEMP 0x0080
383 #define BR_FEATURE_SHADES_0 0x0100
384 #define BR_FEATURE_SHADES_1 0x0200
392 #define BR_MATDIM_ROWS(X) ((X) >> 4)
393 #define BR_MATDIM_COLS(X) ((X) & 0x0f)
400 #define BR_MCU_NONE 0
401 #define BR_MCU_ATTINY85 1
402 #define BR_MCU_ATTINY84 2
403 #define BR_MCU_ATTINY861 3
497 #define BR_REGISTERS 0x40
507 #define BR_REG_CHANGED 0x00
509 #define BR_CHANGED_CHILD 0x01
510 #define BR_CHANGED_GPIO 0x02
511 #define BR_CHANGED_MATRIX 0x04
512 #define BR_CHANGED_ADC 0x40
513 #define BR_CHANGED_UART 0x08
514 #define BR_CHANGED_SHADES 0x10
516 #define BR_CHANGED_TEMP 0x20
523 #define BR_REG_GPIO_0 0x02
524 #define BR_REG_GPIO_1 0x03
526 #define BR_REG_TICKS_LO 0x04
527 #define BR_REG_TICKS_HI 0x05
529 #define BR_REG_TEMP_LO 0x06
530 #define BR_REG_TEMP_HI 0x07
541 #define BR_REG_ADC_0_LO 0x08
542 #define BR_REG_ADC_0_HI 0x09
544 #define BR_REG_ADC_1_LO 0x0a
545 #define BR_REG_ADC_1_HI 0x0b
573 #define BR_REG_UART_CTRL 0x0c
574 #define BR_REG_UART_STATUS 0x0d
575 #define BR_REG_UART_RX 0x0e
576 #define BR_REG_UART_TX 0x0f
578 #define BR_UART_CTRL_RESET_RX 0x01
579 #define BR_UART_CTRL_RESET_TX 0x02
580 #define BR_UART_CTRL_RESET_FLAGS 0x04
582 #define BR_UART_STATUS_RX_MASK 0x07
583 #define BR_UART_STATUS_RX_SHIFT 0
584 #define BR_UART_STATUS_TX_MASK 0x38
585 #define BR_UART_STATUS_TX_SHIFT 3
586 #define BR_UART_STATUS_OVERFLOW 0x40
587 #define BR_UART_STATUS_ERROR 0x80
624 #define BR_REG_MATRIX_0 0x10
625 #define BR_REG_MATRIX_1 0x11
626 #define BR_REG_MATRIX_2 0x12
627 #define BR_REG_MATRIX_3 0x13
628 #define BR_REG_MATRIX_4 0x14
629 #define BR_REG_MATRIX_5 0x15
630 #define BR_REG_MATRIX_6 0x16
631 #define BR_REG_MATRIX_7 0x17
632 #define BR_REG_MATRIX_EVENT 0x18
633 #define BR_REG_MATRIX_ECYCLE 0x19
635 #define BR_MATRIX_EV_VAL_SHIFT 6
636 #define BR_MATRIX_EV_ROW_SHIFT 3
637 #define BR_MATRIX_EV_COL_SHIFT 0
638 #define BR_MATRIX_EV_EMPTY 0x80
639 #define BR_MATRIX_EV_OVERFLOW 0x81
685 #define BR_REG_SHADES_STATUS 0x20
686 #define BR_REG_SHADES_0_POS 0x22
687 #define BR_REG_SHADES_0_RINT 0x23
688 #define BR_REG_SHADES_0_REXT 0x24
689 #define BR_REG_SHADES_1_POS 0x25
690 #define BR_REG_SHADES_1_RINT 0x26
691 #define BR_REG_SHADES_1_REXT 0x27
693 #define BR_SHADES_0_ACT_UP 0x01
694 #define BR_SHADES_0_ACT_DN 0x02
695 #define BR_SHADES_0_BTN_UP 0x04
696 #define BR_SHADES_0_BTN_DN 0x08
697 #define BR_SHADES_1_ACT_UP 0x10
698 #define BR_SHADES_1_ACT_DN 0x20
699 #define BR_SHADES_1_BTN_UP 0x40
700 #define BR_SHADES_1_BTN_DN 0x80
707 #define BR_REG_DEBUG_0 0x38
708 #define BR_REG_DEBUG_1 0x39
709 #define BR_REG_DEBUG_2 0x3a
710 #define BR_REG_DEBUG_3 0x3b
717 #define BR_REG_FWBASE 0x3d
725 #define BR_REG_CTRL 0x3e
726 #define BR_REG_MAGIC 0x3f
728 #define BR_CTRL_UNLOCK_EEPROM 0x01
729 #define BR_CTRL_UNLOCK_FLASH 0x02
730 #define BR_CTRL_HUB_RESURRECTION 0x04
732 #define BR_CTRL_REBOOT 0xe0
733 #define BR_CTRL_REBOOT_NEWFW 0xa0
struct SBrConfigRecord TBrConfigRecord
Brownie configuration record (stored in EEPROM).
struct SBrFeatureRecord TBrFeatureRecord
Brownie feature record (stored in VROM).
char TBrIdRecord[32]
Brownie ID (stored in EEPROM).
EBrStatus BrReplyCheck(TBrReply *reply, uint8_t op, int8_t bytes)
Check received message. 'bytes' is the number of received bytes.
#define BR_MEM_BLOCKSIZE
Block size for 'memRead'/memWrite' operations. Note: This value is an integral part of the communicat...
struct SBrReply TBrReply
Reply message.
EBrStatus BrRequestCheck(TBrRequest *msg, int8_t bytes)
Check received message. 'bytes' is the number of valid bytes in the beginning of the message.
struct SBrRequest TBrRequest
Request message.
int8_t BrRequestSize(uint8_t op)
Get the size of a request message in bytes, depending on the operation.
int8_t BrReplySize(uint8_t op)
Get the size of a reply message in bytes, depending on the operation.
void BrRequestPackage(TBrRequest *msg)
Complete the message for sending (i.e. add checksum).
void BrReplyPackage(TBrReply *reply, int8_t len)
Complete the reply for sending (i.e. add checksum).
@ brOk
Last command executed successfully.
@ brNoDevice
(for masters) No device can be reached under a given address
@ brReplyCheckError
Checksum of reply incorrect or message too short.
@ brNoBrownie
(for masters) No brownie can be reached under a given address (wrong magic number)
@ brForbidden
Operation not allowed.
@ brNoReply
A device did not respond anything (SDA remained pulled up -> 0x[f]f)
@ brIllegalOperation
Non-existing operation.
@ brNoBus
(for masters) General I/O error when accessing the TWI bus
@ brIncomplete
No or incomplete message/reply received.
@ brUnchecked
Message complete, but not yet checked for checksum.
@ brRequestCheckError
Checksum of request incorrect or message too short.
Brownie configuration record (stored in EEPROM).
uint8_t hubSpeed
TWI master speed-down (1 ~= 100KHz; n ~= 100/n KHz)
uint8_t shadesDelayDown[2]
Shades delay in ticks when starting to move down.
uint8_t oscCal
Timer calibration: AVR's OSCCAL register (0xff = load factory default on boot)
uint8_t shadesSpeedDown[2]
Shades motion down per tick.
uint8_t adr
Own TWI address.
uint8_t reserved[2]
(Padding to fill up 16 bytes.)
uint8_t magic
Identify as a Brownie (should always be BR_MAGIC)
uint8_t shadesSpeedUp[2]
Shades motion up per tick.
uint8_t shadesDelayUp[2]
Shades delay in ticks when starting to move up.
int8_t hubMaxAdr
TWI hub subnet: Last address managed by this hub.
Brownie feature record (stored in VROM).
uint16_t gpoPreset
GPIO output default state (will be set on init before Z-state is left)
uint8_t magic
Brownie identification (always = BR_MAGIC)
uint8_t mcuType
MCU type (see BR_MCU_... constants)
uint16_t gpiPresence
GPIO input presence mask (must be disjoint with output presence)
uint8_t versionMajor
Version: major/minor/revision...
uint16_t features
Feature presence (see BR_FEATURE_... masks)
uint16_t gpoPresence
GPIO output presence mask (must be disjoint with input presence)
uint16_t gpiPullup
GPIO input pullup selection; bits for which the internal pullup is activated.
uint8_t reserved[3]
(reserved for future features)
char fwName[12]
Written name of the firmware variant (base name of the .elf file without MCU part)
uint8_t matDim
Matrix dimensions (Bits 7:4: rows, bits 3:0 = cols)
uint8_t status
Checksum (bits 7..4) and status (bits 3:0) (EBrStatus)
uint8_t data[BR_MEM_BLOCKSIZE]
(memRead) Data
uint8_t dataCheck
(memRead) 8-bit checksum for 'data'
uint8_t val
(regRead) Value
uint8_t val
(regWrite) Value to write.
uint8_t check
Checksum (8 bits).
uint8_t data[BR_MEM_BLOCKSIZE]
(memWrite) Data to write
uint8_t adr
(memRead) Memory block address